Generic_uio - IRQ mapping in dts

I kept all your design RTL as is from the //github.com/polarfire-soc/polarfire-soc-buildroot-sdk 2021.04 Release, added a RTL peripheral on the FIC0_MASTER. I can now talk to my peripheral ok via devmem on the linux target. All good!

Next step for me is to map my peripheral with the IRQ using generic-uio driver and no longer using devmem.

Looking at the dts under /polarfire-soc-buildroot-sdk/conf/icicle-kit-es/icicle-kit-es.dts
and looking at the example fpgadma, the MSS_INT_F2M[2] is mapped at 120 so I am guessing the MSS_INT_F2M[3] is 121 and so on, correct?

                           fpgadma: dma@0x60020000 {
                                           #address-cells = <1>;
                                           #size-cells = <0>;
                                           compatible = "microchip,mpfs-fpga-dma-uio";
                                           reg = <0x00 0x60020000 0x0 0x1000>;
                                           interrupt-parent = <&L1>;
                                           interrupts = <120>;
                                           status = "okay";
                           };

Now my peripheral is using several IRQ, so my question is can I map several IRQ in the DTS for the same peripheral like this?

                           mydesign: fpga_mydesign@0x65000000 {
                                           compatible = "generic-uio";
                                           reg = < 0x0 0x65000000 0x0 0x00010000;
                                           interrupt-parent = <&L1>;
                                           interrupts = <121 122 123>;
                                           status = "okay";
                           };

Thanks in advance for your support.

  • update:
    Do we need to define if the IRQ is a edge or level interrupt in the dts?

Yes, MSS_INT_F2M[0:31], as viewed by the PLIC, are numbered [118:149]. And, its the PLIC number that’s used in device-tree stanzas. So, yes, I’d expect MSS_INT_F2M[3] at 121.

Yes, you can user several IRQs and pass that via device-tree. You should see several examples of this in the device-tree already, for instance the stanza relating to the pdma. If you look at the Microchip UIO PDMA driver example in drivers/uio/micochip-pdma.c, you’ll see one way of retrieving several IRQs, using platform_get_irq().

I think a UIO device typically handles one IRQ. The Microchip UIO PDMA driver example creates a device per IRQ. The corresponding user-side code is in /opt/microchip/pdma/pdma-ex.c on the icicle-kit-es build.

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Its very likely you’re using ‘level’. If you are using ‘level’, you don’t need to explicitly specify ‘level’ in dts.

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Hello,
Thanks for the confirmation, I defined my peripheral with a single interrupt as follow

                           mydesign: fpga_mydesign@0x65000000 {
                                           compatible = "generic-uio";
                                           reg = < 0x0 0x65000000 0x0 0x0000100 >;
                                           interrupt-parent = <&L1>;
                                           interrupts = <121>;
                                           status = "okay";
                           };

I rebuilt the buildroot-sdk and flashed the mmc on the icicle-kit. After linux boot I can see the “lsram” and “can” peripheral under /dev/uio0 and /dev/uio1 but I still do not see my new peripheral in any of the other /dev/uioX.
Do I need to set in u-boot something along the line:
setenv bootargs …,uio_pdrv_genirq.of_id=generic-uio ?
However I do not see where I should set it in this linux env…

  • update:
    Actually it seems the uio_pdrv_genirq.of_id=generic-uio is correctly passed somehow to the kernel when linux boot:

    [ 0.000000] Kernel command line: earlyprintk debug console=ttyS0,115200n8 root=mmcblk0p3 uio_pdrv_genirq.of_id=generic-uio pci-hpmemsize=0M libata.force=noncq

    So I do not explain why I am not seeing my new peripheral in the /dev/uio

I commented the following lines on my dts peripheral definition so I am matching the fpgalsram: fpga_lsram@0x61000000 definition which is map to uio0 when linux boot:
# interrupt-parent = <&L1>;
# interrupts = <121>;
but I still do not see my peripheral in the /sys/class/uio/
Any help welcome, thanks

All along I was programming the emmc on the icicle-kit, I decided to see how it goes on the sd card.
Well I finally found my peripheral on the uio1!
So my guess is the following: “Do not use emmc but SD card instead…”

Likely the dts is not being updated in the eMMC work flow but did not succeed in finding the root cause.